USB3 is quite forgiving regarding the layout. The standard +-10% impedance matching is fine, and because there is no dedicated clock line you don't need to do length matching either. Even differential pair length mismatch is not that big of a deal. If 0.1mm is easy to archive, sure go for it, but I'd rather compromise on this in favor of more important parameters.
itsmect
joined 2 years ago
I don't want to rent the battery in my car.
That is why.
destroy [...] assets [...] for the public good
The public would greatly benefit if we destroyed assets of lobbyists and their funders! You're drafting the law for that, right? Right?
NFTs require arbitrary data storage, which not all blockchains support (or are prohibitively expensive).
The major issue is the low market share of crypto and the higher effort required to get USD. If you want USD, Monero can not fix this. So whenever you can offer your goods and services in XMR natively to lesser the dependence on fiat ever so slightly.
We're still here, and have never left. Interest in crypto is primarily driven by price, and with the relative poor market performance attention of the masses is diverted. Almost like if it's planned by those who don't like xmr.
very useful, much appreciated
Improved energy efficiency only results in a higher hashrate with the same amount of energy consumed. Assuming electricity costs dominate the mining expenses, in an efficient system the value of consumed energy should equal the value of mined coins. If it's significantly less, more miners will join until everything is balanced again.
On the flip side this means it's very easy to calculate the running cost of a financial system based on XMR: it's roughly 0.8% of the supply per year, slightly decreasing in the future thanks to the tail emission.
If you use the same metric to determine a cost for the current central banking system, which targets a real inflation of usually 2%, but it's more like a 4%+ cost of living increase for necessities, meaning using monero is AT LEAST 5 times as efficient. However this is ignoring the fees banks demand at every opportunity, so I'd estimate monero is about 10x as efficient.
lol at the ratio. I'd be really curious about which instances the downvotes originated from
You cant remove pocket and telemetry without recompiling. That's why its not just a config file.
What filament do you want to use? Well tuned PLA might be able to bridge that far, no chance with PETG. What is your maximum acceptable sag?
It seems like the bridge lines do not attach to anything at the very end on the layer below. In Orca Slicer you need to enable "Ensure vertical thickness" to enforce that. I'd also rotate the bridge direction by 90°, this cuts down the length of the longest bridges by half. Bridge line spacing looks good to me. Make sure that the layer on top of the bridge is printed slowly and does not start in the middle, otherwise it will be pushed back and forth.
If it is just a mock-up, consider partially filling the interior or enabling "make overhangs printable". Both will alter geometry, but so will excessive sagging.
The signal does not care about how it gets from the sender to the receiver. The only thing that matters is that at the receivers end 0s and 1s can be separated. One common measurement is the eye pattern. If the eye is "open" enough (=matches the spec), communication is possible.
Impedance mismatch causes reflections (visible as oscillation after rising/falling edge), differential pair line mismatch degrades the slop of the signal transition (rising/falling edge). Geometric features only matter if they are large compared to the signal wavelength. As a rule of thumb features smaller then 1/20th of a wavelength can be safely ignored, often times a ratio as large as 1/5 works just fine. USB3 uses 2.5Ghz (5Gbit/s) or 5Ghz (10Gbit/s), where 1/20th result in 3.4mm and 1.7mm respectively (assuming an effective dialectic of 3.17). This is still grossly simplified, because in many real systems you don't control the entire transmission line (eg. user buys a random cable and expects it to work), so it makes sense that the USB consortium specifies eye patterns and factors in various system uncertainties.
RAM on the other hand uses 16/32/64/128 single ended data lines, with a dedicated clock line. Data does not have to arrive perfectly at the same time, but the margin may be as little as 1/10th of a clock cycle. Here accurate length matching is absolutely required. Its also the reason why the same CPU + RAM combination may archive higher stable clock rates on some mainboards then on others.