this post was submitted on 07 Dec 2025
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RISC-V

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RISC-V (pronounced “risk-five”) is a license-free, modular, extensible instruction set architecture (ISA).

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Tenstorrent Blackhole Support & Other New RISC-V + ARM64 Hardware In Linux 6.19 (www.phoronix.com)
submitted 5 days ago by cm0002@literature.cafe to c/riscv@programming.dev
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The set of six branches containing SoC and platform updates/additions for the Linux 6.19 kernel have been merged for enabling a lot of new RISC-V and ARM 64-bit hardware as well as enhancing some existing SoCs/platforms.

Arnd Bergmann sent out all of the SoC updates/additions on Friday for the ongoing Linux 6.19 merge window. There is some exciting new hardware, Device Trees for some new ARM machines, and more

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