this post was submitted on 12 Jun 2023
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RISC-V

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RISC-V (pronounced "risk-five") is a license-free, modular, extensible instruction set architecture (ISA).

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This new code provides the necessary Linux kernel changes for dealing with RISC-V's "V" Vector Extension, including new prctl() interfaces so user-space can check on the status of Vector extension support. a new sysctl knob "riscv_v_default_allow" to adjust changing the default for allowing Vector extension use by user-space software, the "RISCV_ISA_V" Kconfig option for toggling kernel build support with this ISA extension, and various other changes.

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