RISC-V

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RISC-V (pronounced "risk-five") is a license-free, modular, extensible instruction set architecture (ISA).

riscv.org

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founded 4 years ago
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third chapter of the July Update blogpost

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submitted 3 years ago* (last edited 3 years ago) by incici@lemmy.ml to c/riscv@lemmy.ml
 
 

Specs look good. I wonder which distros will support RISC-V now?

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This is great for moving RISC-V to mainstream. Pine64 makes great hardware.

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cross-posted from: https://lemmy.ml/post/299185

two usb C ports on the top left for scale, currently trying to figure out how to build a linux image for it 🤷‍♀️

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cross-posted from: https://lemmy.ml/post/67536

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Why RISC-V Is Succeeding (semiengineering.com)
submitted 3 years ago by testman@lemmy.ml to c/riscv@lemmy.ml
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RISC-V Summit 2021 playlist (invidious.snopyta.org)
submitted 3 years ago by testman@lemmy.ml to c/riscv@lemmy.ml
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[removed] (lemmy.ml)
submitted 4 years ago* (last edited 2 years ago) by cvieira@lemmy.ml to c/riscv@lemmy.ml
 
 

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